EP320DC-2

The Altera EP320 Erasable Programmable Logic Device may be used as a replacement for TTL and 74HC. It also provides a high speed, low power “plug compatible” replacement for fuse-based program-mable logic devices. The EP320 can accommodate up to 18 inputs and up to 8 outputs. The 20 pin, 300 mil package contains 8 Macrocells, each of which utilizes a programmable AND fixed OR structure. This AND-OR structure yields 8 product terms for the logic function as well as an individual product term for Output Enable. The Altera proprietary programmable I/O architec-ture allows the EP320 user to configure output and feedback paths for combinatorial or registered oper-ation, active high or active low. As a result, the EP320 may be configured as a drop in replacement for PAL devices such as the 16R8 and 16L8. In addition to architectural flexibility, performance characteristics allow the EP320 to be used in the widest possible range of applications. The CMOS EPROM technology helps make the EP320 a zero power device at standby as well as allowing for an active power consumption of less than 20% of equivalent bipolar devices without sacrifice in speed performance. This technology also facilitates 100% generic testability as well as UV erasability. As a result, designs and design modifications may be quickly implemented upon a given EP320 without the need for post programming testing. Programming the EP320 is made easy with the Altera A+PLUS development software (A+PLUS ver-sion 4.5 or later release). Using A+PLUS, the user may enter his logic design using schematic capture, netlist entry, Boolean equations and state machine entry. Once the design is entered, A+PLUS performs automatic translation into logical equations, complete Boolean minimization and design fitting directly to an EP320. The device can then be programmed to achieve customized working silicon within minutes at the designer’s own desktop.